SN74SSQEA32882 28-Bit to 56-Bit Registered Buffer
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• JEDEC SSTE32882 Compliant
• 1-to-2 Register Outputs and 1-to-4 Clock Pair Outputs Support Stacked DDR3 RDIMMs
• CKE Powerdown Mode for Optimized System Po.
• DDR3 Registered DIMMs up to DDR3-1600
• DDR3L Registered DIMMs up to DDR3L-1333
• Single-, Dual- and Quad-.
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